As electronic products move to smaller size, higher density and performance, semiconductors have correspondingly become smaller with their components and connections becoming denser. This in turn has lead to the development of multichip packages (MCPs) in which a plurality of semiconductor chips are stacked on a substrate such as a printed circuit board. This creates a high density, high performance package that is nonetheless small in size.
As density increases and size decreases, however, problems may develop with multichip modules. For example, in FIG. 1, an MCP includes a first semiconductor chip 10 mounted on a substrate 12. A second semiconductor chip 14 is mounted on semiconductor chip 10 thereby forming an MCP comprising semiconductor chips 10, 14. Chip 10, which is larger than chip 14, includes terminals such as terminals 16, 18. Chip 14 also includes terminals, like terminals 20, 22. As can be seen, the terminals on chip 14 are spaced much more closely together than those on chip 10. The terminals on both chips are electrically connected to conductive pads, like pads 24, 26, formed on substrate 12 via wire bonds, such as wire bonds 28, 30. When electrically connected to the pads on the substrate of the MCP, the terminals of the upper chip are often further away and higher from the substrate than those of the lower chip. As a consequence, the electrical connections (e.g. wire bonds) connecting the terminals of the upper chip to the substrate pads of the MCP are often longer; and form greater angles relative to the substrate than those connecting the terminals of the lower chip to the substrate pads. Moreover, the terminals on the upper chip are often deployed much closer together. All the above factors may combine to produce wire sweeping, in which the wire bonds connecting the terminals of the upper chip can electrically short against one another. Furthermore, the longer each wire bond, the more likely the wire will be broken during manufacturing, e.g., when the wires are encapsulated.
In addition to these problems, when the terminals are close together as on chip 14, there is a limit to how many adjacent terminals can be wire bonded to the substrate. As seen in FIG. 1, there is a gap indicated generally at 31 that must be included because the density and length of the bonds limit the number of adjacent wire bond connections.
Therefore, it is desired to provide electrical connections in MCPs.